? semiconductor components industries, llc, 2011 may, 2011 ? rev. 6 1 publication order number: mc74vhct240a/d mc74vhct240a octal bus buffer/line driver inverting with 3 ? state outputs the mc74vhct240a is an advanced high speed cmos octal bus buffer fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. the mc74vhct240a is an inverting 3 ? state buffer, and has two active ? low output enables. this device is designed to be used with 3 ? state memory address drivers, etc. the vhct inputs are compatible with ttl levels. this device can be used as a level converter for interfacing 3.3 v to 5.0 v, because it has full 5.0 v cmos level output swings. the vhct240a input and output (when disabled) structures provide protection when voltages between 0 v and 5.5 v are applied, regardless of the supply voltage. these input and output structures help prevent device destruction caused by supply voltage ? input/output voltage mismatch, battery backup, hot insertion, etc. features ? high speed: t pd = 5.6 ns (typ) at v cc = 5.0 v ? low power dissipation: i cc = 4 a (max) at t a = 25 c ? ttl ? compatible inputs: v il = 0.8 v; v ih = 2.0 v ? power down protection provided on inputs and outputs ? balanced propagation delays ? designed for 4.5 v to 5.5 v operating range ? low noise: v olp = 1.1 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: human body model > 2000 v; machine model > 200 v ? chip complexity: 110 fets or 27.5 equivalent gates ? these devices are pb ? free and are rohs compliant soeiaj ? 20 suffix m case 967 http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information marking diagrams 74vhct240 awlywwg 20 1 20 1 1 tssop ? 20 suffix dt case 948e soic ? 20wb suffix dw case 751d vhct 240a alyw 1 1 20 1 vhct240a awlyywwg a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package (note: microdot may be in either location)
mc74vhct240a http://onsemi.com 2 figure 1. logic diagram data inputs a1 a2 a3 a4 b1 b2 b3 b4 17 15 13 11 8 6 4 218 16 14 12 9 7 5 3 yb4 yb3 yb2 yb1 ya4 ya3 ya2 ya1 inverting outputs output enables oea oeb 1 19 figure 2. pin assignment a3 a2 yb4 a1 oea gnd yb1 a4 yb2 yb3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 ya2 b4 ya1 oeb v cc b1 ya4 b2 ya3 b3 oea , oeb a, b ya , yb l l h l h x h l z inputs outputs function table ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ???? ?????????????? ?????????????? ?????????????? ? state high or low state ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 75 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ?derating ? soic packages: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c recommended operating conditions ???? ???? ???????????????????????? ???????????????????????? ??? ??? ???? ???? ?? ?? ???? ???? v cc ???????????????????????? ???????????????????????? ??? ??? ???? ???? ?? ?? ???? ???? ???????????????????????? ???????????????????????? ??? ??? ???? ???? ?? ?? ???? ???? ???? ???????????????????????? ???????????????????????? ???????????????????????? ? state high or low state ??? ??? ??? ???? ???? ???? ?? ?? ?? ???? ???? ???????????????????????? ???????????????????????? ??? ??? ? 40 ???? ???? ?? ?? c ???? ???? ???????????????????????? ???????????????????????? 0.5v ??? ??? ???? ???? ?? ?? ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74vhct240a http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? ???? ???? ???? ????????? ????????? ????????? ??????? ??????? ??????? ???? ???? ???? ?????? ?????? c ??????? ??????? ? 40 to 85 c ?? ?? ?? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ???? ???? v ih ????????? ????????? ? level input voltage ??????? ??????? ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ???? ????????? ????????? ????????? ? level input voltage ??????? ??????? ??????? ???? ???? ???? ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ????????? ????????? ????????? ? level output voltage v in = v ih or v il ??????? ??????? ? 50 a ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ??????? ??????? ? 8ma ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ????????? ????????? ????????? ? level output voltage v in = v ih or v il ??????? ??????? a ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ??????? ??????? ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ????????? ????????? ??????? ??????? ???? ???? ??? ??? ?? ?? ??? ??? 0.1 ???? ???? ???? ???? 1.0 ?? ?? a ???? ???? ???? ????????? ????????? ????????? ? state leakage current ??????? ??????? ??????? ???? ???? ???? ??? ??? ??? ?? ?? ?? ??? ??? ??? 0.25 ???? ???? ???? ???? ???? ???? 2.5 ?? ?? ?? a ???? ???? ???? ????????? ????????? ????????? ??????? ??????? ??????? ???? ???? ???? ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? a ???? ???? ???? ????????? ????????? ????????? ??????? ??????? ??????? ???? ???? ???? ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ????????? ????????? ??????? ??????? ???? ???? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? a ????????????????????????????????? ????????????????????????????????? ac electrical characteristics (input t r = t f = 3.0ns) ???? ???? ???? symbol ?????????? ?????????? ?????????? ????????? ????????? ????????? ?????? ?????? c ??????? ??????? ? 40 to 85 c ?? ?? ?? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ???? ???? t plh , t phl ?????????? ?????????? ????????? ????????? 0.5v c l = 15pf c l = 50pf ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ???? ?????????? ?????????? ?????????? ????????? ????????? ????????? 0.5v c l = 15pf r l = 1k c l = 50pf ??? ??? ??? ?? ?? ?? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ?????????? ?????????? ?????????? ????????? ????????? ????????? 0.5v c l = 50pf r l = 1k ??? ??? ??? ?? ?? ?? 8.8 ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ?????????? ?????????? ????????? ????????? 0.5v c l = 50pf (note 1) ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ?????????? ?????????? ????????? ????????? ??? ??? ?? ?? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ? state output capacitance (output in high ? impedance state) ????????? ????????? ????????? ????????? ??? ??? ??? ??? ?? ?? ?? ?? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? typical @ 25 c, v cc = 5.0v pf 19 1. parameter guaranteed by design. t oslh = |t plhm ? t plhn |, t oshl = |t phlm ? t phln |. 2. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc / 8 (per bit). c pd is used to determine the no ? load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . noise characteristics (input t r = t f = 3.0ns, c l = 50pf, v cc = 5.0v) symbol parameter t a = 25 c unit typ max v olp quiet output maximum dynamic v ol 0.9 1.1 v v olv quiet output minimum dynamic v ol ? 0.9 ? 1.1 v v ihd minimum high level dynamic input voltage 2.0 v v ild maximum low level dynamic input voltage 0.8 v
mc74vhct240a http://onsemi.com 4 ordering information device package shipping ? mc74vhct240adwrg soic ? 20wb (pb ? free) 1000 / tape & reel mc74vhct240adtrg tssop ? 20* 2500 / tape & reel MC74VHCT240AMELG soeiaj ? 20 (pb ? free) 2000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free. figure 3. switching waveform figure 4. switching waveform oea or oeb ya or yb ya or yb 1.5v t pzl t plz t pzh t phz 3v high impedance v ol +0.3v v oh -0.3v high impedance gnd t plh ya or yb a or b t phl 1.5v 1.5v 3v v ol v oh 1.5v 1.5v gnd *includes all probe and jig capacitance c l * test point device under test output figure 5. test circuit *includes all probe and jig capacitance c l * test point device under test output figure 6. test circuit connect to v cc when testing t plz and t pzl . connect to gnd when testing t phz and t pzh . 1 k figure 7. input equivalent circuit input
mc74vhct240a http://onsemi.com 5 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. soic ? 20 wb dw suffix case 751d ? 05 issue g
mc74vhct240a http://onsemi.com 6 package dimensions tssop ? 20 case 948e ? 02 issue c dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . 110 11 20 pin 1 ident a b ? t ? 0.100 (0.004) c d g h section n ? n k k1 jj1 n n m f ? w ? seating plane ? v ? ? u ? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74vhct240a http://onsemi.com 7 package dimensions soeiaj ? 20 m suffix case 967 ? 01 issue a dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.15 0.25 0.006 0.010 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc74vhct240a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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